Japan’s Panasonic has developed a sheet-form encapsulation material for coreless package substrates that enables thinner-profile and lower-cost semiconductor packages.
Slated for production from June, the CV2008 series material is designed to be optimised for the insulation layers of coreless package substrates.
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The product is suitable for large-area encapsulation, and helps produce thinner packages at a lower cost.
It can also be used for new coreless procedures, such as the copper pillar resin encapsulation process, as it eliminates the need for laser drilling.
Insulation layers for package substrates can be manufactured using a large-area press process, which enables the cost-efficient mass production of packages.
The sheet-form encapsulation material is available in a variety of thicknesses, ranging from 20µm-200µm.
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By GlobalDataPanasonic noted that the material has modulus of elasticity of 17,000MPa at 25°C, and reduces warpage of packages.
Its low shrinkage rate of 0.003% ensures connection reliability during high-temperature reflow processes, increasing the production yield of the package assembly process.
Last month, the company announced that it had developed a substrate material, Megtron GX series, which helps produce thinner and less expensive semiconductor packages.
Image: Sheet form encapsulation material. Photo: courtesy of Panasonic.
