American semiconductor company Onto Innovation has launched a new ‘Applications Center of Excellence’ dedicated specially for panel-level packaging (PLP) to facilitate growth in the chiplet market.
This centre is located within the company’s headquarters in Wilmington, Delaware, US.
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It will function as a combined tool demonstrator, process integration photo resist qualification, as well as a research and development (R&D) centre.
Onto said the facility has been developed primarily for supporting advanced packaging process development for PLP, advanced integrated circuit substrates, and wafer-level packaging.
In addition, the facility will provide hands-on experience of Onto’s hardware and software solutions such as the Firefly sub-micron panel defect inspection system, large exposure field JetStep X500 lithography system and Discover software family, to the company’s PLP customers.
The centre will also allow customers to access the systems and processes that are offered by collaborating with OEMs and materials providers.
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By GlobalDataOnto CEO Michael Plisinski said: “Our customers want to accelerate their technology roadmaps, and we will assist them by leveraging our experience and access to next-generation processes and equipment, from both Onto and our partners.
“This collaborative approach to process development will help our customers accelerate roadmaps and we expect this will result in shortened time to yield when in production.”
The centre is expected to further strengthen Onto’s capabilities to capitalise on the technical complexities and fast growth of the chiplet market.
Plisinski added: “The R&D phase is more important now than ever, especially when it concerns PLP.
“By facilitating connections between Onto, our customers and our collaborators, we will use this critical time to craft turnkey solutions for build-up films, redistribution layers, photoresists, copper-clad laminate substrates and glass substrates.
“With the application of Onto’s smart factory-enabling Yield Optimiser software, we can intelligently bridge the gaps between fabrication and advanced packaging processes, accelerating time to market for key process steps that bring heterogeneously integrated chips, and chiplets to life.”
